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TC90A49P/F
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC90A49P,TC90A49F
3LINE DIGITAL Y / C SEPARATOR IC (MULTICOLOR TYPE)
The TC90A49P / F is a 3-line digital Y / C (luminance / chrominance) separation IC for PAL, NTSC, M-PAL and N-PAL format.
FEATURES
* * * * * * * * * * * TV format : NTSC (3.58), PAL, M-PAL, and N-PAL Dynamic comb filter Vertical edge enhancement circuit PLL 8 x multiplier circuit Internal 8-bit 4 fsc AD converter Internal 8-bit precision 8 fsc DA converter (2 ch) Sync tip clamp circuit Internal 4H-line memory I2C bus interface Package : DIP 20-pin and SOP 24-pin 5 V single power supply
Weight DIP20-P-300-2.54A : SOP24-P-450-1.27B :
1.11 g 0.44 g
(Typ.) (Typ.)
000707EBA1
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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BLOCK DIAGRAM
PIN ASSIGNMENT
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PIN DESCRIPTION
no. before / indicates DIP package pin no. no. after / indicates SOP package pin no.
PIN No. 1
PIN NAME VDD2
FUNCTION ADC and DAC analog power supply.
I/O -
INTERFACE -
2
BIAS
ADC bias voltage. Stabilize by attaching a 0.01F capacitor.
-
3
VRT
ADC input range D upper limit voltage. Stabilize by attaching a 0.01F capacitor.
-
4/5
AIN
ADC input. Inputs 1.0 Vp-p video signal. Sync tip clamp is performed.
I
5/6
VRB
ADC input range D lower limit voltage. Stabilize by attaching a 0.01F capacitor.
-
6/7 7/8 8 / 10
VDD3 VSS2 VDD4
ADC and DAC logic power supply. Logic and internal DRAM GND (digital). Internal DRAM power supply.
- - -
- - -
9 / 11
SDA
I C BUS SDA
2
I/O
10 / 12
SCL
I C BUS SCL
2
I
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PIN No. PIN NAME FUNCTION I/O INTERFACE
Shipment test mode switch or I C bus setting reset pin. 11 / 13 TEST When High, test mode, setting all I C bus settings to 0. Hold High for at least 100s. when this pin is Low. Send I C bus settings
2 2
2
I
12 / 14
KILLER
Y signal comb function ON / OFF switch. When High, comb OFF. When Low, comb ON. When [data 3 : bit 0] is 1, used as vertical edge enhancement circuit ON / OFF switch.
I
13 / 15
CKIN
Clock input pin. Pin 13 put a sine wave which is locked to the frequency of the burst signal in the input video signal. Amplitude is 300 mV p-p to 2 Vp-p. Input as high an amplitude as possible without affecting peripheral circuits.
I
14 / 17
FIL
Connect the APC filter in the 8 fsc PLL circuit.
-
15 / 18 16 / 19
VDD1 VSS1
PLL power supply. ADC, DAC, and PLL GND (analog).
- -
- -
17 / 20
COUT
Outputs chrominance signal. External simple LPF for clock elimination recommended.
O
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PIN No. PIN NAME FUNCTION I/O INTERFACE
18 / 22
DAVRT
DAC output range D upper limit voltage. Stabilize by attaching a 0.01F capacitor.
-
19 / 23
DAVRB
DAC output range D lower limit voltage. Stabilize by attaching a 0.01F capacitor.
-
20 / 24
YOUT
Outputs luminance signal. External simple LPF for clock elimination recommended.
O
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FUNCTION DESCRIPTION (Pin no. in this section refers to DIP package pin no.)
1. AD converter (ADC)
High-speed 8-bit AD converter. The input dynamic range is 1.3 Vp-p (max) input of video signals of 1.0 Vp-p (from sync tip level to 100% white level).
= 256 steps. They recommends
2. Clamp circuit
Performs sync tip clamp of the input video signal. The clamp level is determined internally to use the ADC dynamic range efficiently.
3. Line memory
Incorporates DRAM-resident, four 1-H delay circuits. Combination of delay circuits and delay times are determined according to the signal format selected by the I2C bus.
TV Format Delay Amount (clock) NTSC 910 PAL 1135 N-PAL 917 M-PAL 909
4. Band pass filter (BPF)
Extracts the chrominance signal from the line-memory-delayed composite video signal. The same filter is used by NTSC, PAL, M-PAL, and N-PAL formats. The center frequency is fsc. The characteristics differ depending on the TV format. BPFs are provided for both input and output sides of the dynamic comb filter. The input side can be set to a wide band. The output side can be set to either a wide or a narrow band using the I2C bus control.
5. Dynamic comb filter (DCF)
Using Toshiba's original decision logic, detects a correlation of the three consecutive vertical lines for NTSC, every other three lines for PAL, and extracts the chrominance signal accordingly.
6. Vertical edge enhancement circuit
Generates edge components in proportion to the luminance differential signal of the three consecutive vertical lines and adds the components to the luminance signal output. There are eight enhancement levels selected by the I2C bus. The coring circuit eliminates differential signals caused by noise ; thus, increase in noise due to edge enhancement is reduced. Signals lower than the pedestal level due to the addition of the edge enhancement signal may be generated ; however, such signals are eliminated by the pedestal clip circuit at a later stage. Therefore, there is no adverse effect on the sync processor circuit. The coring circuit regards small edge components as noise and does not perform enhancement.
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(1) Input signal with edge component
a : Vertical edge level
(2) Output signal
b : Enhance level
Vertical edge enhancement characteristic
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Vertical edge enhancement characteristic (Zoom)
7. PLL 8 x multiplier circuit
Multiplies by eight the input subcarrier signal which is locked to the frequency of burst signal to generate 8 fsc and 4 fsc system clocks.
8. DA converter (DAC)
The Y / C signal separated using the 4 fsc clock as the basic clock is over-sampled by the 8 fsc clock, then DA-converted.
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9. Color killer circuit
When the input video signal is a monochrome image, this circuit enables effective use of the luminance signal information regardless of whether there is a burst signal. It does this by preventing the chroma signal output from the comb filter from being subtracted from the luminance signal. While the VBI signal is active it is better not to use the comb function. Setting the KILLER pin to High at this time enables the use of character multiplex and other signals from the Y output unchanged.
10. RESET / TEST pin
Switches between normal comb operation and test operation. Also used for I2C bus reset input. Change in voltage from Low to High triggers a reset. Normal use is Low.
11. I C bus interface
Some functions and setting values can be selected using the I2C bus. The data transfer format conforms to the Philips I2C bus format.
2
Data transfer format
S Slave address (8 bit) A DATA1 A DATA2 A DATA3 A P
S : start condition Slave address : B4 (HEX) 2
A : acknowledge
P : end condition
12. I C bus control contents : When a reset signal is input, all the following bits are zero-cleared.
MSB bit7 DATA1 DATA2 DATA3 MODE2 VNLR3 TRAP LSB bit0 CB COR0 ENHOFF
bit6 MODE1 VNLR2 CHTRAP
bit5 MODE0 VNLR1 Fixed to 0
bit4 VENH2 VNLR0 CBPF
bit3 VENH1 GSEL1 Fixed to 0
bit2 VENH0 GSEL0 Fixed to 0
bit1 PDSOFF COR1 Fixed to 0
Mode 2 to Mode 0 : Select video signal format. 000 : Analog Through Mode 001 : M-PAL 010 : N-PAL 011 : PAL 100 : NTSC When Analog Through mode is selected, input video signals are output to Yout and Cout unchanged. In Analog Through mode, the delay time for output signals differs from those used for other modes. Therefore, when changing modes to Analog Through mode, to decide the input signal format, provide some delay time until an image is displayed. There is a case where a 1 LSB error voltage at frequency fsc is multiplexed with the output signal. When deciding the input signal format, to avoid an erroneous decision due to fsc leakage, be careful when setting the decision sensitivity (killer sensitivity). When the input signal is SECAM or 4.43 NTSC, select Analog Through mode. A separate BELL filter or a BPF is required.
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VENH2 to VENH0 : Set vertical enhancer gain. 000 : (+0.0) to 111 : (+1.5) PDSOFF : Switches pedestal clip ON / OFF after vertical edge enhancement circuit. 0 : ON 1 : OFF CB : Sets Color Killer mode to ON / OFF 0 : Y signal comb function ON 1 : Y signal comb function OFF (Same composite signal is output from Y and C pins.) VNIR3 to VNIR0 : Set vertical enhancer non-linear point. 0000 : 4 LSB (internal set of IC to 4 LSB) to 1111 : 64 LSB (internal set of IC to 64 LSB) GSEL1 : Sets Y output horizontal peaking gain. 0 : 1.5 dB 0 : ON 1 : 3.0 dB 1 : OFF GSEL0 : Switches Y output horizontal peaking ON / OFF. COR1 and COR0 : Set vertical enhancer coring level. 00 : 0 LSB to 11 : 3 LSB TRAP : Sets C output 1 / 2 fsc trap ON / OFF. 0 : ON 0 : -24 dB 1 : OFF 1 : -16 dB 1 : Wide band = BPF OFF 1 : Comb ON / OFF and vertical edge enhancement ON / OFF CHTRAP : Sets C output trap gain. CBPF : Switches C output BPF ON / OFF (BPF characteristic after dynamic comb filter output). 0 : Narrow band = BPF ON ENHOFF : Sets KILLER pin function. 0 : Comb ON / OFF
Signal level inside the IC The sync tip of the input video signal is clamped to an internal level equivalent to 6 LSB. When a signal amplitude of 1.0 V is equivalent to 140 IRE, 100% white status becomes an internal level of 209 LSB. At this time, the input dynamic range of 256 LSB is equivalent to 1.3 Vp-p.
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MAXIMUM RATINGS (Ta = 25)
CHARACTERISTIC Power Supply Voltage Pin Voltage Power Dissipation Power Dissipation Storage Temperature Max Min 49P (Note) 49F (Note) SYMBOL VDD Vinmax Vinmin PD PD Tstg RATING VSS + 6.0 VDD + 0.3 VSS - 0.3 550 458 -55~125 UNIT V V mW mW C
(Note) : Ta = 70C
RECOMMENDED OPERATING CONDITIONS
CHARACTERISTIC Power Supply Voltage Digital Input Voltage Operating Temperature SYMBOL VDD VDIN Topr MIN 4.75 0 -10 TYP. 5.0 - - MAX 5.25 VDD 70 UNIT V V C NOTE
ELECTRICAL CHARACTERISTICS (Pin no. corresponds to DIP package pin no.) DC CHARACTERISTICS
(Ta = 25C, VDD = 5.0 V, CKIN = 3.58 MHz, 1.0 Vp-p input, Ain = no input, in all modes)
CHARACTERISTIC Power Supply Current SYMBOL IDD V2 V3 Pin Voltage V4 V5 V18 V19 MIN 40 0.5 2.85 1.65 1.65 2.85 1.65 TYP. 75 1.3 3.15 1.85 1.85 3.15 1.85 MAX 85 2.1 3.48 2.02 2.02 3.48 2.02 UNIT mA V V V V V V NOTE Supply current, in all modes Pin 2 : ADC bias Pin 3 : AD range D upper limit Pin 4 : Ain input pin voltage Pin 5 : AD range D lower limit Pin 18 : DA range D upper limit Pin 19 : DA range D lower limit
DC CHARACTERISTICS
(Ta = 25C, VDD = 5.0 V, CKIN = each fsc, Ain = no input, unless otherwise specified, in all modes)
CHARACTERISTIC SYMBOL YOUT COUT MIN 1.65 1.65 TYP. 1.85 1.85 MAX 2.02 2.02 UNIT V V NOTE Pin 20 : YOUT Pin 17 : COUT
Output Voltage
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DC CHARACTERISTICS
(Ta = 25C, VDD = 5.0 V, CKIN = each fsc, Ain = no input, unless otherwise specified, in all modes)
CHARACTERISTIC SYMBOL MIN TYP. MAX UNIT V V V V V V Pin 20 : YOUT Pin 17 : COUT NTSC mode 3.579545 MHz PAL mode 4.433619 MHz M-PAL mode 3.575611 MHz N-PAL mode 3.582056 MHz NOTE
Output Voltage
YOUT COUT
1.65 2.25 - - - -
1.85 2.5 2.2 2.4 2.2 2.2
2.02 2.67 - - - -
FIL Pin (pin 14) Voltage FIL Pin (pin 14) Voltage FIL Pin (pin 14) Voltage FIL Pin (pin 14) Voltage
V14 V14 V14 V14
PLL CHARACTERISTICS
(Ta = 25C, VDD = 5.0 V, CKIN = 1.0 Vp-p input, Ain = no input, unless otherwise specified, in all modes)
CHARACTERISTIC Pull-in Frequency Range (NTSC) Pull-in Frequency Range (PAL) Pull-in Frequency Range (NPAL) Pull-in Frequency Range (MPAL) Input Amplitude (fsc sine wave) SYMBOL fckN fckP fckN fckM Vck MIN - - - - TYP. - - - - MAX 100 100 100 100 2.0 UNIT kHz kHz kHz kHz Vp-p NOTE In relation to fsc center frequency In relation to fsc center frequency In relation to fsc center frequency In relation to fsc center frequency
0.3
1.0
DIGITAL CHARACTERISTICS (Ta = 25, VDD = 5.0 V)
CHARACTERISTIC Input Voltage Current at ACK Output SYMBOL VIH VIL Ack MIN 4 - 4 TYP. - - - MAX - 1 - UNIT V V mA NOTE Pin 9, Pin 10, Pin 12 Pin 9, Pin 10, Pin 12 Pin 9 VOLmax : 0.4 V
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AC CHARACTERISTICS (Ta = 25C, VDD = 5.0 V, CKIN = 1.0 Vp-p input)
(1)Y Input (Ain = input, unless otherwise specified, in all modes except Analog Through Mode)
CHARACTERISTIC AD Input Top Level Input D Range AD Input Bottom Level AD Input Difference Between Top and Bottom YDA Output Top Level Output D Range YDA Output Bottom Level YDA Output Difference Between Top and Bottom SYMBOL VADt VADb VAD VDAt VDAb VDA GY MIN 2.85 1.65 -20 2.85 1.65 -20 TYP. 3.15 1.85 - 3.15 1.85 - MAX 3.48 2.02 +20 3.48 2.02 +20 UNIT V V mV V V mV Input / output gain measured in ADDA Through mode -3 dB frequency -3 dB frequency -3 dB frequency Difference between comb top and bottom (Reference value) (Reference value) NOTE
YOUT Low Frequency Gain YOUT Frequency Characteristic (Peaking OFF) YOUT Frequency Characteristic (Peaking 1.5 dB) YOUT Frequency Characteristic (Peaking 3.0 dB) YOUT Comb Characteristic YOUT Differential Accidental YOUT Integral Accidental Output Impedance
-0.5
0.0
0.5
dB
FW FW1 FW2 Ycom L B Zy
- - - 40 -1 -3 300
4.7 6.2 6.7 45 0 0 600
- - - - +1 +3 900
MHz MHz MHz dB LSB LSB
(2)C Output (Ain = input, unless otherwise specified, in all modes except Analog Through
Mode)
CHARACTERISTIC Output Dynamic Range COUT Gain Input COUT Gain Comb Characteristic Differential Gain Differential Phase Output Impedance SYMBOL VCOUT GC Ccom DG DP Zc MIN - -0.5 35 0 0 300 TYP. 1.0 0.0 40 2 2 600 MAX 1.0 + 0.5 - 5 5 900 UNIT V dB dB % D Range of C Output gain at comb operation Difference between comb top and bottom NOTE
(3)CHARACTERISTICS BY BUS SETTING
(Ain = input, unless otherwise specified, in all modes except Analog Through Mode)
CHARACTERISTIC C-BPF Characteristic (Wide Band) C-BPF Characteristic (Narrow Band) SYMBOL BW 1 BW 0 MIN - - TYP. -2.5 -3.0 MAX - - UNIT dB dB NOTE Attenuation at fsc -0.5 MHz Attenuation at fsc -0.5 MHz
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TEST CIRCUIT (TC90A49P)
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APPLICATION CIRCUIT (TC90A49P)
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PACKAGE DIMENSIONS
DIP20-P-300-2.54A Unit : mm
Weight : 1.11g (Typ.)
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PACKAGE DIMENSIONS
SOP24-P-450-1.27B Unit : mm
Weight : 0.44g (Typ.)
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